dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
DS70283K-page 24
2007-2012 Microchip Technology Inc.
3.6
Arithmetic Logic Unit (ALU)
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
ALU is 16 bits wide and is capable of addition, subtraction,
bit shifts and logic operations. Unless otherwise
mentioned, arithmetic operations are 2’s complement in
nature. Depending on the operation, the ALU can affect
the values of the Carry (C), Zero (Z), Negative (N),
Overflow (OV) and Digit Carry (DC) Status bits in the SR
register. The C and DC Status bits operate as Borrow and
Digit Borrow bits, respectively, for subtraction operations.
The ALU can perform 8-bit or 16-bit operations,
depending on the mode of the instruction that is used.
Data for the ALU operation can come from the W
register array or data memory, depending on the
addressing mode of the instruction. Likewise, output
data from the ALU can be written to the W register array
or a data memory location.
Refer to the “16-bit MCU and DSC Programmer’s Ref-
erence Manual” (DS70157) for information on the SR
bits affected by each instruction.
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
CPU
incorporates
hardware
support
for
both
multiplication and division. This includes a dedicated
hardware
multiplier
and
support
hardware
for
16-bit-divisor division.
3.6.1
MULTIPLIER
Using the high-speed 17-bit x 17-bit multiplier of the
DSP engine, the ALU supports unsigned, signed or
mixed-sign operation in several MCU multiplication
modes:
16-bit x 16-bit signed
16-bit x 16-bit unsigned
16-bit signed x 5-bit (literal) unsigned
16-bit unsigned x 16-bit unsigned
16-bit unsigned x 5-bit (literal) unsigned
16-bit unsigned x 16-bit signed
8-bit unsigned x 8-bit unsigned
3.6.2
DIVIDER
The divide block supports 32-bit/16-bit and 16-bit/16-bit
signed and unsigned integer divide operations with the
following data sizes:
1.
32-bit signed/16-bit signed divide
2.
32-bit unsigned/16-bit unsigned divide
3.
16-bit signed/16-bit signed divide
4.
16-bit unsigned/16-bit unsigned divide
The quotient for all divide instructions ends up in W0
and the remainder in W1. 16-bit signed and unsigned
DIV instructions can specify any W register for both the
16-bit divisor (Wn) and any W register (aligned) pair
(W(m + 1):Wm) for the 32-bit dividend. The divide
algorithm takes one cycle per bit of divisor, so both
32-bit/16-bit and 16-bit/16-bit instructions take the
same number of cycles to execute.
3.7
DSP Engine
The DSP engine consists of a high-speed 17-bit x
17-bit multiplier, a barrel shifter and a 40-bit
adder/subtracter (with two target accumulators, round
and saturation logic).
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
is a single-cycle instruction flow architecture; therefore,
concurrent operation of the DSP engine with MCU
instruction flow is not possible. However, some MCU ALU
and DSP engine resources can be used concurrently by
the same instruction (e.g., ED, EDAC).
The DSP engine can also perform inherent accumula-
tor-to-accumulator operations that require no additional
data. These instructions are ADD, SUB and NEG.
The DSP engine has options selected through bits in
the CPU Core Control register (CORCON), as listed
below:
Fractional or integer DSP multiply (IF)
Signed or unsigned DSP multiply (US)
Conventional or convergent rounding (RND)
Automatic saturation on/off for ACCA (SATA)
Automatic saturation on/off for ACCB (SATB)
Automatic saturation on/off for writes to data
memory (SATDW)
Accumulator Saturation mode selection (ACCSAT)
A block diagram of the DSP engine is shown in
TABLE 3-1:
DSP INSTRUCTIONS
SUMMARY
Instruction
Algebraic
Operation
ACC Write
Back
CLR
A = 0
Yes
ED
A = (x - y)2
No
EDAC
A = A + (x – y)2
No
MAC
A = A + (x * y)
Yes
MAC
A = A + x2
No
MOVSAC
No change in A
Yes
MPY
A = x y
No
MPY
A = x2
No
MPY.N
A = – x y
No
MSC
A = A – x y
Yes
相关PDF资料
DSPIC33FJ64MC710-I/PF IC DSPIC MCU/DSP 64K 100TQFP
EFM32G200F64 MCU 32BIT 64KB FLASH 32-QFN
EFM32G210F128 IC MCU 32BIT 128KB FLASH 32QFN
EFM32G222F64 IC MCU 32BIT 64KB FLASH QFP48
EFM32G230F128 IC MCU 32BIT 128KB FLASH 64QFN
EFM32G232F64 IC MCU 32BIT 64KB FLASH LQFP64
EFM32G280F64 MCU 32BIT 64KB FLASH 100-LQFP
EFM32G290F64 MCU 32BIT 64KB FLASH 112-BGA
相关代理商/技术参数
dsPIC33FJ32MC202-E/SO 功能描述:数字信号处理器和控制器 - DSP, DSC 16B DSC 28LD32KB Motor40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32MC202-E/SP 功能描述:数字信号处理器和控制器 - DSP, DSC 16B DSC 28LD32KB Motor40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32MC202-E/SS 功能描述:数字信号处理器和控制器 - DSP, DSC 16 bit DSC 40MIPS 32KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32MC202-H/MM 功能描述:数字信号处理器和控制器 - DSP, DSC 16-bit 32KB Flash 40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32MC202-H/SO 功能描述:数字信号处理器和控制器 - DSP, DSC 16-bit 32KB Flash 40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32MC202-I/MM 功能描述:数字信号处理器和控制器 - DSP, DSC 16B DSC 28LD 32KB FlashMotor40 RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSPIC33FJ32MC202-I/MM 制造商:Microchip Technology Inc 功能描述:16 bit DSC 28LD 32KB Flash Motor 40 MIPS
DSPIC33FJ32MC202-I/MM 制造商:Microchip Technology Inc 功能描述:DSC 16BIT 32K FLASH 40MIPS 28QFN-S 制造商:Microchip Technology Inc 功能描述:DSC, 16BIT, 32K FLASH, 40MIPS, 28QFN-S